Intel 486 SX Processor KU80486SX-33 SX673 33MHz i486 CPU Socket

Intel 486 SX Processor KU80486SX-33 SX673 33MHz i486 CPU Socket

The Intel KU80486SX-33 (stepping SX673) is a 33 MHz i486 SX processor — the SX variant of Intel's landmark 486 architecture, running at 33 MHz and housed in a 168-pin ceramic PQFP package with a full gold pin array. The SX designation indicates that the internal floating-point unit (FPU/math coprocessor) is disabled or absent, distinguishing it from the i486 DX line; systems requiring floating-point performance could pair it with an external Intel 487 SX math coprocessor.

Specifications & What's Included

• Manufacturer: Intel
• Part Number: KU80486SX-33
• Stepping / S-Spec: SX673
• Clock Speed: 33 MHz
• Architecture: i486 SX (32-bit)
• Data Bus: 32-bit
• Address Bus: 32-bit (4 GB addressable)
• Integrated FPU: No (SX variant — FPU disabled; compatible with Intel 487 SX coprocessor)
• Package: 168-pin ceramic PQFP with gold contact pins
• Cache: 8 KB unified on-chip L1 cache
• Compatible upgrade socket: Intel OverDrive processor upgradeable
• Included: CPU only

Applications

The Intel 486 SX was introduced in 1991 as a more cost-effective entry into the 486 platform, targeting budget desktop and laptop systems of the early-to-mid 1990s. It powered a wide range of PC/AT-compatible machines running MS-DOS, Windows 3.x, and early Windows 95, and was used in everything from home desktops to embedded industrial PCs and single-board computers. The 33 MHz SX673 stepping is a common find in 486-era motherboards designed around the Socket 168 footprint. Today these processors are sought by vintage PC collectors and enthusiasts restoring or building period-accurate 486 machines, as well as by industrial users maintaining legacy embedded systems that still rely on 486-class hardware. The SX variant's lack of an integrated FPU is historically significant — it represents Intel's market segmentation strategy of the era and is directly compatible with the Intel 487 SX coprocessor for users who needed floating-point capability.